JED2Z8K software automatically converts ACUGEN Softwares ATGEN® vector files (.JWV files) into Teradyne Z8000 General Test Language. This product, when used in conjunction with ATGEN software, provides a complete solution for in-circuit testing of PLDs on Teradyne Z8000 board testers.
Creates General Test Language
Teradyne Z8000 testers use the General Test Language (Stimulus & Expect States) to test the PLD during in-circuit testing. The output files are in the "TEMPLATE" format used as library elements in the APG phase of board test development.
The disables information for each PLD is to be supplied by the user as part of the board test program.
The software has the option to include the JEDEC vectors as comments.
Files Compile and Run Without Debug
Vectors produced by ATGEN software contain no races or backdriving problems.
Easy to Use
The translator is invoked by typing "JED2Z8K", followed by the name of the .JWV file, at the operating system prompt.
Technical Support Service and Updates
Technical support is provided under the support plan for your particular ATGEN base product.
JED2Z8K software must be run on a computer that has a general purpose or board test ATGEN base product (S22, S45, S50, S60) installed.