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JED2V Software

ACUGEN[TM] JWV File to
Verilog and VHDL

JED2V Software translates the output of ACUGEN Software's ATGEN[TM] test generator (the JWV file) into Verilog and VHDL vectors (testbenches). These vectors can then be used for simulation on a Verilog or VHDL simulator.

When JED2V is used with the ATGEN software, verification of multiple design representations through simulation is truly automated.

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Automatic Vector File Creation

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Easy to Use
JED2V requires only the name of the JWV file to generate complete Verilog and VHDL testbenches. No other knowledge of programming or testing is needed. Options are provided to control use of arrays, array subscript direction, physical versus symbolic pin names, and driving unused pins to reduce noise.

Altera MAX name integration
JED2V can read and interpret signal name information for Altera MAX designs so that arrays have correct subscripting to match the Verilog or VHDL model to be simulated.

Fast Translations
Typically, JED2V translates a JWV file into Verilog and VHDL testbench files in under one minute.

Verilog Example 

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test244 dut( .a1_(a1_), .a2_(a2_), .y2_(y2_), .y1_(y1_),
        .oe_neg(oe_neg), .tdo(tdo), .tms(tms), .tck(tck), .tdi(tdi));

integer vector;
integer fail_count;
reg [12:0] indata[3983:0];
reg [8:0] outdata[3983:0];

initial begin : lbl
        fail_count = 0;

        indata[0] = 13'bz100zzzzzzzzz;
        outdata[0] = 9'bxxxxxxxxx;
        indata[1] = 13'bz110zzzzzzzzz;
        outdata[1] = 9'bxxxxxxxxx;
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        for( vector = 0; vector < 3984; vector = vector + 1) begin
                #5000 aa_stimulus = indata[vector];
                aa_expects = outdata[vector];
                #5000 casez(aa_response)
                aa_expects: 
                        $display( "V%d  %b -> %b", vector, aa_stimulus, aa_response );
                default:
                        begin
                                fail_count = fail_count + 1;
                                $display( "V%d  %b -> %b should be %b", vector, aa_stimulus, aa_response, aa_expects );
                        end
                endcase
        end
        if( fail_count ) $display( "%d failures in simulation", fail_count );
        else $display( "Good simulation" );
        $finish;
        end
        endmodule
Technical Support Service and Updates
Update service and support during the first year is part of the purchase price, including bug fixes, enhancements to software, documentation and telephone support.

ACUFIX[TM] On-line Technical Support System
Visit our website at www.acugen.com. ACUFIX is our on-line technical support system which is designed to give customers more involvement in ACUGEN technical support operations. Users may enter questions and issues via work orders, check status of work order, or browse on-line database of solved ATG issues.

Patches, release notes, frequently asked questions and other documentation is also available for browsing.

ACUGEN and ATGEN are registered trademarks, and AADELAY, AASERVER, ACUFIX, ACUTAP, PROGBSDL, TESTBSDL and SHARPEYE are trademarks of Acugen Software, Inc.


7nov01

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