JED2ATP PLUS is a software package that translates the output of ACUGEN Software's AADELAY TM (the .JDL file) into a ATP grammar file and TPP source file. When JED2ATP Plus is used with ATGEN® and AADELAY software, PLD test program development for the GenRad GR115, GR125, and GR130 VLSI tester is truly automated. JED2ATP Plus is easy to use and will produce test programs that will check PLDs for DC Parametric, Functional, and AC Parametric compliance.
JED2ATP Plus translates the .JDL file into an ATP grammar for use with GenRad's ATP1. (ASCII To PAR) translator. The ATP grammar contains information to create a complete .PAR file including all screens necessary to perform DC parametric, AC parametric, and functional testing.
JED2ATP Plus also translates the .JDL file into a complete TPP source file for use with GenRad's TPP1. (Test Pattern Processor) translator. The TPP source contains pin mapping and the test vectors necessary to functionally achieve the ATGEN stated PLD fault coverage. All C's and K's are automatically converted into the appropriate RZ/R1 wave forms respectively.
JED2ATP Plus will typically translate a .JDL (Jedec with DeLays) file into an ATP grammar and TPP source file in less than one minute when running on a 10Mhz IBM AT or compatible.
AC Parametric Testing
JED2ATP Plus will automatically create AC parametric tests to verify a PLD's compliance with its tPLH, tPHL, tPLZ, tPHZ, tPZL, and tPZH specifications. The end-user can specify the number of propagation delay tests to perform on each output pin. All AC test limits are determined by the delay, phase, and settling time data obtained from the ACUGEN AADELAY .JDL file. The .JDL file data enables JED2ATP Plus to create AC tests for PLD designs with complex feedback paths, I/O switching, etc., as effortlessly as AC tests for simple PLD designs.
JED2ATP Plus provides full control over the tester's active loads through the use of parameter files. Each AC test can effectively have the output pins connected to a pull-up load, a pull-down load, both a pull-up and a pull-down load, or no-load.
Test Adaptor Support
JED2ATP Plus will automatically generate the PINDEFS section of the TPP file for the 24-pin UNIDAB and 64-pin UNIDAB adaptors. The driver and sensor resources are allocated and mapped according to the PLD's pin count and design requirements, thereby permitting most PLDs to be tested on a single test adaptor. The user may alternatively specify a PINDEFS file name on the command line to handle special cases, such as custom adaptors or different IC package styles, e.g., DIP, LCC, PLCC, and SOIC.
All test programs contain a header section which documents the translation process, tester requirements, load board and DUT card requirements, which JEDEC/JWV/JDL file was used, which pin mapping file was used, the programmer, as well as several lines of user-supplied comments. A message file is also created that documents the entire translation process.
Unlimited PLD Support
JED2ATP Plus comes standard with over 50 ASCII parameter files for both commercial and military PLDs. These parameter files contain the DC and AC parametric test conditions and DC parametric test limits for the PLD. The user can modify these files to suit their needs or create new parametric files using a text editor. JED2ATP Plus comes with detailed instructions on how to create your own parameter files so the user should never be more than a few minutes away from obtaining support for any PLD.
JED2ATP Plus is presently available for IBM PC/XT/AT personal computers and compatibles running PCDOS or MSDOS operating system software version 3.0 and higher.
Technical Support Service and Updates
Technical support is provided under the support plan for your particular ATGEN base product.
1.ATP and TPP are standard utilities which GenRad supplies with version 2.1 and higher system software.