AAMAX Software automatically converts qualified Altera® MAXTM designs into simulation models for use by ATGEN® test generation software. This preprocessor software product, when used in conjunction with ATGEN test generation software, allows vector generation for Altera's MAX series programmable logic devices.
Great time saver when testing Altera MAX devices
Altera MAX devices (EPM5032, EPM5128, EPM7256 ...) are powerful and complex PLDs, best thought of as small gate arrays. Their flexibility and large size makes manual test development painful and time consuming. The AAMAX and ATGEN software automate the test development process, thereby providing major time savings. ACUGEN ATE translators are also available to produce component and in-circuit test programs, including automatic generation of digital guarding conditions for in-circuit board tests. We estimate the payback for AAMAX software to be 1-4 testable Altera MAX designs.
Interface to Design
The AAMAX translator reads the netlist information from either of two formats:
1) .EDF file (EDIF format), generated by Altera's SNF2EDF tool.
2) .RPT file, generated by Altera's MAX+PLUS software.
In either case, the .FIT file is also read in order to obtain pinout information.
The AAMAX translator produces models that support PINS, LOGIC and MIL454 fault classes. Fuse faults are not supported primarily because the .EDF and .RPT files contain no fuse information. The .EDF and .RPT design sources will result in different numbers of LOGIC faults and somewhat different percentages detected even for the same design. .EDF and .RPT formats will produce similar results when the MIL454 fault class is used.
Service and Support
Technical service and support are provided in the same manner as your ATGEN base product.
Easy to Use
The translator is invoked by typing "AAMAX", followed by the name of the design, at the operating system prompt.
FASTpass Version Available
For users wanting a fast and low-cost solution well suited to test for the following common board test defects: unprogrammed parts, part in backwards, wrong part/mislabeled part, catastrophic device failure, and numerous open pins, this product is tailored to shallow designs (sequential depth 10). It is a quick check only.
For those customers who need high coverage fault detection typical of our Premium ATGEN test generators, the Premium levels of pre-processors are the better choice.
.EDF versus .RPT design files
There are a number of factors to consider when deciding which design file format to use with the AAMAX software. While the .EDF format may require purchase of the EDIF toolkit from Altera, it offers more assurance of long term support. Altera may change the .RPT format at any time, which may prevent us from building an accurate ACUGEN model from the .RPT file in the future. The .EDF file also has the advantage of containing accurate timing information for AC testing applications.
The main advantages of the .RPT format are somewhat faster run-times, less disk space usage, and more readable signal names in equation and fault reports.
AAMAX software must be run on a computer that has an ATGEN S25, S55 or S60 base product installed, and this base product must be maintained up to the latest revision at the time of initial AAMAX purchase. The host computer should have at least 5MB of RAM to run MAX32 designs and at least 16MB of RAM for MAX256 designs. These devices have critical CPU speed and memory requirements. See attached Memory Chart for recommendations.
You will need an S55 or S60 version of ATGEN software to run the Premium versions of this software, and an S25, S55 or S60 version to run the FASTpass versions.
.EDF files are obtained by running SNF2EDF software, which is available from Altera as part of their EDIF support tool product. .RPT files are obtained by running version 2.50 of Altera's MAX+PLUS software with the long reporting option.
Success Rate for Premium Versions
Due to the potential complexity of Altera MAX devices no software can be guaranteed to reach high coverage on 100% of designs. We recommend that SHARPEYE testability analysis software be used during design to enhance testability. If SHARPEYE software is used and reports no problems with the testability items recommended by us, then we expect our success rate to be 90% on designs with fewer than 100 memory elements and 80% on designs with more than 100 memory elements. A 80% success rate means ATGEN software will detect 90% of detectable gate output stuck-at faults and 100% of pin stuck-at faults on 80% of a typical mix of designs. Note that even an 80% success rate will put you way ahead of writing all tests manually.
Our policy of requesting users to send us designs that attain low coverage has allowed us to make major improvements in our software over the past few years, and we expect the success rate on these Altera devices to continue improving.
The testability items we recommend be checked are:
sequential depth less than 500,
no feedback-memories that interact with any other memories,
all clocks, sets, resets controlled by external pins,
no gated clocks,
combinatorial tri-state enable control on outputs
To test these devices the user must have access to a tester, or a programmer, with enough driver/sensors to stimulate & test all the pins of these devices.